The subject matter described and/or illustrated herein relates generally to electrical connectors and, more particularly, to electrical connectors that are mounted on circuit boards.
To meet digital multi-media demands, higher data throughput is often desired for current digital communications equipment. Electrical connectors that interconnect circuit boards must therefore handle ever increasing signal speeds at ever increasing signal densities. However, at the footprints of the circuit boards where the electrical connectors connect thereto it may be difficult to improve density while maintaining electrical performance and/or reasonable manufacturing cost. For example, vias within the circuit boards must be large enough to plate for a given circuit board thickness, but must also be far enough apart from one another to maintain electrical performance (e.g., impedance and/or noise). To increase the number of vias, and therefore increase the density of the circuit board footprint, the vias must be smaller and/or closer together. However, moving the vias closer together degrades the electrical performance of the circuit board footprint, while decreasing the size of the vias may increase manufacturing costs by increasing the difficulty of plating the vias. Circuit board footprints are currently the bottleneck for achieving higher system densities and/or higher system speeds.
Different known approaches have been used to improve the electrical performance and/or density of circuit board footprints. For example, careful via placement, anti-pad optimization, and counter boring of via stubs have been used to improve circuit board footprints. However, to achieve higher system densities and speed, further improvement of circuit board footprints must be made over known approaches.
There is a need for an electrical connector that enables improvement of the density and/or electrical performance of circuit board footprints to achieve higher system densities and/or higher system speeds.